The present invention relates to the field of electronic design automation for integrated circuits, and in particular, to the area of automatic routing of nets of interconnect taking into account parasitic constraint rules.
Integrated circuits are important building blocks of the information age and are critical to the information age, affecting every industry including financial, banking, legal, military, high technology, transportation, telephony, oil, medical, drug, food, agriculture, education, and many others. Integrated circuits such as DSPs, amplifiers, DRAMs, SRAMs, EPROMs, EEPROMs, Flash memories, microprocessors, ASICs, and programmable logic are used in many applications such as computers, networking, telecommunications, and consumer electronics.
Consumers continue to demand greater performance in their electronic products. For example, higher speed computers will provide higher speed graphics for multimedia applications or development. Higher speed internet web servers will lead to greater on-line commerce including on-line stock trading, book sales, auctions, and grocery shopping, just to name a few examples. Higher performance integrated circuits will improve the performance of the products in which they are incorporated.
Large modern day integrated circuits have millions of devices including gates and transistors and are very complex. As process technology improves, more and more devices may be fabricated on a single integrated circuit, so integrated circuits will continue to become even more complex with time. To meet the challenges of building more complex and higher performance integrated circuits, software tools are used. These tools are in an area commonly referred to as computer aided design (CAD), computer aided engineering (CAE), or electronic design automation (EDA). There is a constant need to improve these electronic automatic tools in order to address the desire for higher integration and better performance in integrated circuits.
Within an integrated circuit, there are devices, such as transistors, and interconnect. Interconnect is used to connect signals between the circuitry and also to supply power to the circuitry. Interconnect may include metal lines, polysilicon lines, polysilicide lines, or other conductive materials. Interconnect is also sometimes referred to as nets. There may be more than one layer of interconnect, such as metal-1 and metal-2 layers. There is a need for a technique of automatically routing the interconnect of an integrated circuit. Automatic routing will automatically connect the inputs of particular devices or circuits to the appropriate outputs, typically from other circuits or devices, or from the pins of those devices.
Automatic routers are generally designed to minimize the wire length of each path routed, and so minimize the amount of space required for the circuit. However, this will tend to create dense wiring patterns with wires running for a long distance near to other wires. In modern fabrication processes this will mean that the capacitance of the signal will be significantly increased, and potentially, coupling of signals will occur (known as crosstalk).
When a signal needs to have smaller capacitance so that it can meet its performance targets, the automatic router may remove the existing wiring pattern for that signal and try to find another pattern which is better (i.e., “rip-up and reroute”). However, if the router is not conscious of the capacitance of each wiring segment as it is created, and of the impact this has upon the performance of the finished signal, then the result of rerouting will often be as bad as the original wiring.
Therefore, when automatically routing the interconnect, there is a need to create a system by which the router can understand the parasitic issues of the wiring as it is created, and for it to be able to choose wiring patterns so that the signals meet their performance requirements.